全新的中繼器和信號(hào)調(diào)理器，實(shí)現(xiàn)更好的信號(hào)完整性

細(xì)節(jié)

二極管重新驅(qū)動(dòng)器解決了對(duì)高速接口信號(hào)完整性產(chǎn)生負(fù)面影響的五個(gè)主要問題:

信號(hào)衰減:  包括差分信號(hào)在內(nèi)的高速信號(hào)會(huì)引入噪聲和抖動(dòng)，從而導(dǎo)致信號(hào)電壓擺幅超過或低于最佳眼開度。這導(dǎo)致在高速信號(hào)切換期間信號(hào)質(zhì)量下降。

信號(hào)強(qiáng)度:  接口越來越多地被集成到中央處理器芯片組中。雖然在實(shí)驗(yàn)室中提供了出色的性能，但當(dāng)設(shè)計(jì)到具有多層電路板、長走線和延長電纜長度的真實(shí)系統(tǒng)中時(shí)，這些芯片組往往不夠強(qiáng)大，無法提供合理的設(shè)計(jì)余量來滿足合規(guī)性規(guī)格。

信號(hào)距離:  布局限制、控制器到連接器的分離、多個(gè)印刷電路板層、過孔、子板連接器和長電纜都導(dǎo)致信號(hào)距離和更大的信號(hào)降級(jí)。例如，F(xiàn)R4印刷電路板走線上的信號(hào)損耗通常為0.3分貝/英寸(2.5 Gbps)，0.9分貝(8 Gbps)。

噪音:  隨機(jī)和確定性噪聲都會(huì)降低各種來源的信號(hào)完整性，包括來自其他信號(hào)的串?dāng)_。隨機(jī)抖動(dòng)的另一個(gè)常見來源是噪聲時(shí)鐘源，它沒有良好的隔離或阻抗不匹配。

缺乏端到端控制: 當(dāng)接口連接到外部子系統(tǒng)或設(shè)備時(shí)，設(shè)計(jì)人員無法控制信號(hào)距離、電路板過孔、連接器和電纜，信號(hào)仍必須通過這些設(shè)備才能到達(dá)目的地。這可能會(huì)增加噪聲、抖動(dòng)、衰減和插入損耗，并導(dǎo)致設(shè)計(jì)良好的設(shè)備無法與其他制造商的設(shè)備接口。

原始設(shè)備制造商面臨的挑戰(zhàn)是，隨著信號(hào)速度的提高，這些因素變得更加明顯，導(dǎo)致可靠性、吞吐量和質(zhì)量受損。為了幫助開發(fā)人員保持信號(hào)完整性，二極管提供了無與倫比的信號(hào)調(diào)理技術(shù)，并提供了全面的設(shè)備組合，適用于PCI Express、USB、Thunderbolt、SAS/SATA、藍(lán)牙、Wi-Fi、HDMI和其他流行標(biāo)準(zhǔn)。好處包括:

卓越的信號(hào)質(zhì)量: 二極管再驅(qū)動(dòng)器具有最低的抖動(dòng)和衰減，實(shí)現(xiàn)行業(yè)最高性能。比較研究在NDA下提供。

最低串?dāng)_: 通過將串?dāng)_降至最低，二極管保持通道間和器件間的低偏斜。

高度可配置:為了給開發(fā)人員提供更大的靈活性，二極管的再驅(qū)動(dòng)器可以通過I2C的一個(gè)微控制器在每個(gè)通道的基礎(chǔ)上進(jìn)行配置，而不必像其他技術(shù)一樣進(jìn)行固定或硬連線。

能效:這些器件旨在實(shí)現(xiàn)低功耗運(yùn)行和高效功耗。例如，二極管的SAS/SATA再驅(qū)動(dòng)器每個(gè)通道的功耗不到100毫瓦，并且具有市場上最佳的功率效率。

多端口: 二極管的再驅(qū)動(dòng)器支持多種多通道配置，提供靈活性，同時(shí)實(shí)現(xiàn)更大的集成和成本節(jié)約。

多協(xié)議: “二極管”是行業(yè)中唯一一家提供在SATA和SAS環(huán)境下都能工作的全面的再驅(qū)動(dòng)器產(chǎn)品組合的制造商。

軟包裝: 二極管的再驅(qū)動(dòng)器有多種封裝選擇，以滿足您應(yīng)用的特定成本、性能和功率需求。對(duì)于4 mm x 4 mm數(shù)量級(jí)的設(shè)備，這些重新驅(qū)動(dòng)器可以靠近接口連接器放置，以將信號(hào)損失降至最低。

改善信號(hào)完整性增加了系統(tǒng)的整體信號(hào)裕量。原始設(shè)備制造商可以利用這一增加的信號(hào)裕量:

●   提高信號(hào)可靠性和魯棒性

●   增加信號(hào)能夠可靠傳輸?shù)淖畲笞呔€距離和/或電纜長度

●   減少有效隔離信號(hào)所需的電路板層數(shù)，大幅降低系統(tǒng)成本

●   無論系統(tǒng)連接的外部設(shè)備質(zhì)量如何，都要確保連接性

●   通過在信號(hào)鏈的其他地方使用精度較低的器件，提高靈活性，簡化設(shè)計(jì)，加快上市時(shí)間，并降低系統(tǒng)成本。

“二極管”是跨應(yīng)用的驅(qū)動(dòng)技術(shù)的市場領(lǐng)導(dǎo)者，包括網(wǎng)絡(luò)、嵌入式計(jì)算和通信等。例如，在服務(wù)器市場上，“二極管”是第一個(gè)實(shí)現(xiàn)SATA3兼容的驅(qū)動(dòng)器制造商，其技術(shù)已被80%以上的服務(wù)器存儲(chǔ)設(shè)計(jì)所采用。二極管的再驅(qū)動(dòng)器也是許多控制器供應(yīng)商參考設(shè)計(jì)的一部分，包括英特爾。

作為其作為信號(hào)完整性領(lǐng)導(dǎo)者的承諾的一部分，二極管為其客戶提供了無與倫比的設(shè)計(jì)支持，包括評(píng)估板的可用性、專業(yè)的原理圖和布局審查，以及使用S參數(shù)模型、AMI-IBIS或HSPICE優(yōu)化關(guān)鍵開口的系統(tǒng)模擬。

高速SAS 2.0、SATA 3.0、PCIe 2.0、PCIe 3.0、USB 3.0、DP 1.1和DP 1.2

●   增加信號(hào)距離

●   增加設(shè)計(jì)靈活性

●   標(biāo)準(zhǔn)符合性

●   提高性能

●   提高可靠性

●   降低印刷電路板和電纜成本

●   獨(dú)特的差異化產(chǎn)品，最大限度地發(fā)揮協(xié)議的潛力

Details

Diodes ReDrivers address the five major issues negatively impacting the signal integrity of high-speed interfaces:

Signal Attenuation:  High-speed signals, including differential signals, introduce noise and jitter that causes signal voltage swings to overshoot or undershoot the optimal eye opening.  This results in a degraded signal during high-speed signal switching.  

Signal Strength:  Interfaces are increasingly being integrated into CPU chipsets.  While providing excellent performance in the lab, many of these chipsets are often not strong enough to provide reasonable design margin to meet compliance specs when designed into real-world systems with multi-layer boards, long traces, and extended cable lengths.

Signal Distance:  Layout constraints, controller-to-connector separation, multiple PCB layers, vias, daughterboard connectors, and extensive cable lengths all contribute to signal distance and greater signal degradation.  For example, signal losses over FR4 PCB traces are typically 0.3dB per inch at 2.5 Gbps and 0.9 dB at 8 Gbps.

Noise:  Both random and deterministic noise degrade signal integrity from a variety of sources, including crosstalk from other signals.  Another common source of random jitter is a noisy clock source that does not have good isolation or has impedance mismatches.

Lack of end-to-end control:  When an interface connects to an external subsystem or device, designers do have not control over the signal distance, board vias, connectors, and cables over which the signal must still pass to reach its destination.  This can increase noise, jitter, attenuation, and insertion losses, and cause otherwise well-designed devices to fail to interface to equipment from other manufacturers.

The challenge for OEMs is that, as signal speeds increase, these factors become more pronounced, causing reliability, throughput, and quality to suffer.  To help developers maintain signal integrity, Diodes offers unparalleled signal conditioning technology with a comprehensive portfolio of devices for PCI Express, USB, Thunderbolt, SAS/SATA, Bluetooth, Wi-Fi, HDMI, and other popular standards.  Benefits include:

Superior Signal Quality: Diodes  ReDrivers have the lowest jitter and attenuation for the highest performance in the industry.  Comparative studies are available under NDA.

Lowest Crosstalk:  By minimizing crosstalk, Diodes keeps channel-to-channel and part-to-part skew low.

Highly configurable:  To provide developers greater flexibility, Diodes' ReDrivers can be configured on a per channel basis via an MCU over I2C rather than having to be pinstrapped or hardwired like other technologies.

Power Efficiency:  These devices are architected for both low power operation and efficient power consumption.  For example, Diodes' SAS/SATA redrivers consume less than 100 mW per channel and have the best power efficiency on the market.

Multi-port:  Diodes' redrivers support a variety of multi-channels configurations, providing flexibility while enabling greater integration and cost savings.  

Multi-protocol:  Diodes' is the only manufacturer in the industry to offer a comprehensive portfolio of redrivers that work in both SATA and SAS environments.

Flexible packaging:  Diodes' redrivers come in a variety of packaging options to meet the specific cost, performance, and power needs of your application.  With devices on the order of 4 mm x 4 mm, these redrivers can be placed close the interface connector to minimize signal losses.

Improving signal integrity increases the overall signal margin of systems.  OEMs can use this increased signal margin to:

●   Improve signal reliability and robustness

●   Increase the maximum trace distance and/or cable lengths over which signals can reliably be run

●   Reduce the number of board layers required to isolate signals effectively and substantially lower system cost

●   Ensure connectivity regardless of the quality of the external device to which a system is connected

●   Increase flexibility to simplify design, speed time-to-market, and reduce system cost by being able to use lower precision components elsewhere in the signal chain.

Diodes' is the market leader in redriver technology across applications, including networking, embedded computing, and communications, among others.  For example, in the server market, Diodes' was the first redriver manufacturer to achieve SATA3 compliance, and its technology has been adopted in more than 80% of server storage designs.  Diodes' redrivers are also part of many controller vendor reference designs, including Intel.  

As part of its commitment as the signal integrity leader, Diodes' offers unparalleled design support to its customers, including availability of evaluation boards, professional schematic and layout review, and system simulation to optimize the key opening using S-Parameter models, AMI-IBIS, or HSPICE.

High speed SAS 2.0, SATA 3.0, PCIe 2.0,PCIe 3.0, USB 3.0, DP 1.1 and DP 1.2

●   Increased signaling distance

●   Increased design flexibility

●   Standards compliance

●   Improved performance

●   Increased reliability

●   Reduced PCB & cable cost

●   Unique, differentiatted products to maximize the protocol's potential