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EEPW首頁 > 模擬技術(shù) > 設(shè)計(jì)應(yīng)用 > 基于LPC1311設(shè)計(jì)的Cortex-M3 CPU USB接

基于LPC1311設(shè)計(jì)的Cortex-M3 CPU USB接

作者： 時(shí)間：2012-04-14 來源：網(wǎng)絡(luò) 收藏
important; FLOAT: none; WORD-SPACING: 0px; FONT: 14px/24px 宋體, arial; TEXT-TRANSFORM: none; COLOR: rgb(0,0,0); TEXT-INDENT: 42px; WHITE-SPACE: normal; LETTER-SPACING: normal; BACKGROUND-COLOR: rgb(255,255,255); orphans: 2; widows: 2; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px">GPIO pins can be used as edge and level sensitive interrupt sources.

Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, or the watchdog clock.

Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 40 of the functional pins.

Brownout detect with four separate thresholds for interrupt and one threshold for forced reset.

Power-On Reset (POR).

Integrated oscillator with an operating range of 1 MHz to 25 MHz.

12 MHz internal RC oscillator trimmed to 1 % accuracy over the entire temperature and voltage range that can optionally be used as a system clock.

Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.

System PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.

For USB (LPC1342/43), a second, dedicated PLL is provided.

關(guān)鍵詞： LPC1311 Cortex-M3 CPU USB

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