外設(shè)一個一個學(xué)_PWM

#ifndef __S5PC100_LED_HHHH
#define __S5PC100_LED_HHHH

//need arg = 0/1/2/3
#define PWM_ON _IO(K, 0)
#define PWM_OFF _IO(K, 1)
#define SET_PRE _IO(K, 2)
#define SET_CNT _IO(K, 3)

#endif

#include
#include
#include
#include
#include

#include
#include

#include "s5pc100_pwm.h"

MODULE_LICENSE("GPL");

#define S5PC100_GPDCON 0xE0300080
#define S5PC100_TIMER_BASE 0xEA000000

#define S5PC100_TCFG0 0x00
#define S5PC100_TCFG1 0x04
#define S5PC100_TCON 0x08
#define S5PC100_TCNTB1 0x18
#define S5PC100_TCMPB1 0x1C

static int pwm_major = 250;
static int pwm_minor = 0;
static int number_of_device = 1;

struct s5pc100_pwm
{
struct cdev cdev;
unsigned int *gpdcon;
void __iomem *timer_base;
};

struct s5pc100_pwm *pwm;

static int s5pc100_pwm_open(struct inode *inode, struct file *file)
{
writel((readl(pwm->gpdcon) & ~(0xf << 4)) | (0x2 << 4), pwm->gpdcon);
writel(readl(pwm->timer_base + S5PC100_TCFG0) | 0xff, pwm->timer_base + S5PC100_TCFG0);
writel((readl(pwm->timer_base + S5PC100_TCFG1) & ~(0xf << 4)) | (0x2 << 4), pwm->timer_base + S5PC100_TCFG1);
writel(0x200, pwm->timer_base + S5PC100_TCNTB1);
writel(0x100, pwm->timer_base + S5PC100_TCMPB1);
writel((readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8)) | (0x2 << 8), pwm->timer_base + S5PC100_TCON);
//writel((readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8)) | (0x9 << 8), pwm->timer_base + S5PC100_TCON);

return 0;
}

static int s5pc100_pwm_release(struct inode *inode, struct file *file)
{
return 0;
}

static long s5pc100_pwm_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
switch(cmd)
{
case PWM_ON:
writel((readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8)) | (0x9 << 8), pwm->timer_base + S5PC100_TCON);
break;
case PWM_OFF:
writel(readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8), pwm->timer_base + S5PC100_TCON);
break;
case SET_PRE:
writel(readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8), pwm->timer_base + S5PC100_TCON);
writel((readl(pwm->timer_base + S5PC100_TCFG0) & ~0xff) | arg, pwm->timer_base + S5PC100_TCFG0);
writel((readl(pwm->timer_base + S5PC100_TCON) & ~(0xf << 8)) | (0x9 << 8), pwm->timer_base + S5PC100_TCON);
break;
case SET_CNT:
writel(arg, pwm->timer_base + S5PC100_TCNTB1);
writel(arg >> 1, pwm->timer_base + S5PC100_TCMPB1);
break;
}

return 0;
}

static struct file_operations s5pc100_pwm_fops = {
.owner = THIS_MODULE,
.open = s5pc100_pwm_open,
.release = s5pc100_pwm_release,
.unlocked_ioctl = s5pc100_pwm_unlocked_ioctl,
};

static int s5pc100_pwm_init(void)
{
int ret;

dev_t devno = MKDEV(pwm_major, pwm_minor);

ret = register_chrdev_region(devno, number_of_device, "s5pc100_pwm");
if (ret < 0) {
printk("register_chrdev_regionn");
return ret;
}

pwm = kmalloc(sizeof(*pwm), GFP_KERNEL);
if (pwm == NULL) {
ret = -ENOMEM;
goto err1;
}

cdev_init(&pwm->cdev, &s5pc100_pwm_fops);
pwm->cdev.owner = THIS_MODULE;
ret = cdev_add(&pwm->cdev, devno, 1);
if (ret < 0) {
printk("cdev_addn");
goto err2;
}

pwm->gpdcon = ioremap(S5PC100_GPDCON, 4);
if (pwm->gpdcon == NULL) {
ret = -EINVAL;
goto err3;
}

pwm->timer_base = ioremap(S5PC100_TIMER_BASE, 0x30);
if (pwm->timer_base == NULL) {
ret = -EINVAL;
goto err4;
}

return 0;
err4:
iounmap(pwm->gpdcon);
err3:
cdev_del(&pwm->cdev);
err2:
kfree(pwm);
err1:
unregister_chrdev_region(devno, number_of_device);
return ret;
}

static void s5pc100_pwm_exit(void)
{
dev_t devno = MKDEV(pwm_major, pwm_minor);
iounmap(pwm->gpdcon);
iounmap(pwm->timer_base);
cdev_del(&pwm->cdev);
kfree(pwm);
unregister_chrdev_region(devno, number_of_device);
}

module_init(s5pc100_pwm_init);
module_exit(s5pc100_pwm_exit);