STM32 FSMC總線深入研究
2. FSMC時序研究
下圖為FSMC寫命令與數(shù)據(jù)的時序圖,從中根據(jù)上圖可以分析出FSMC可以實現(xiàn)16M的數(shù)據(jù)寫入。FSMC的信號線翻轉非???,這使得IC或者FPGA時序設計上得非常嚴謹。FSMC最大實現(xiàn)了72MHz(66.7到100MHz之間,實際為72MHz,HCLK)的翻轉速度,這要求外部器件支持那么高的速率。
寄存器配置(寄存器+數(shù)據(jù))
連續(xù)數(shù)據(jù)寫入(0xBB:寫數(shù)據(jù)開始),命令后,RS默認拉低(FSMC和標準不一樣的地方)
數(shù)據(jù)建立很快
寫數(shù)據(jù),然后默認RS拉低
整體的時序可模擬為:
task task_writecmd;
input [15:0] cmd;
begin
mcu_cs = 0;
mcu_rs = 0;
mcu_data = cmd;
#20;
mcu_we = 0;
#20;
mcu_we = 1;
#15;
mcu_rs = 1;
mcu_cs = 1;
#20;
end
endtask
task task_writedata;
input [15:0] data;
begin
mcu_cs = 0;
mcu_rs = 1;
mcu_data = data;
#20;
mcu_we = 0;
#20;
mcu_we = 1;
#15;
mcu_rs = 1;
mcu_cs = 1;
#20;
end
endtask
3. FSMC接口初始化
根據(jù)手冊,相關參數(shù)如下表所示。這里我發(fā)現(xiàn)所謂最小值還能設置為最小,但實際速度差不多。FSMC協(xié)議時間參數(shù)如下所示:
有人跟我說,手冊是保守的;有人跟我說,在小就是默認值了。我不太理解。感覺速度每提升,應該在小就是默認了。不過,反正我追求速度的極限。
以下是FSMC-SRAM模式下的初始化代碼,分享的同時,希望對你有用。
typedefstruct{ vu16 LCD_REG; vu16 LCD_RAM; } LCD_TypeDef;#defineLCD_WriteCmd(cmd) LCD->LCD_REG = cmd#defineLCD_WriteData(data) LCD->LCD_RAM = data#defineLCD_BASE ((u32)(0x60000000 | 0x0C000000))#defineLCD ((LCD_TypeDef *) LCD_BASE)voidLCD_FSMCConfig(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDefp;//標準// p.FSMC_AddressSetupTime = 1;// p.FSMC_AddressHoldTime = 2;// p.FSMC_DataSetupTime = 2;// p.FSMC_BusTurnAroundDuration = 1;// p.FSMC_CLKDivision = 1;// p.FSMC_DataLatency = 2;//超快p.FSMC_AddressSetupTime = 0; p.FSMC_AddressHoldTime = 0; p.FSMC_DataSetupTime = 1; p.FSMC_BusTurnAroundDuration = 0; p.FSMC_CLKDivision = 0; p.FSMC_DataLatency = 0; p.FSMC_AccessMode = FSMC_AccessMode_A; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;//2.0FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); }
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